The present disclosure generally relates to semiconductor manufacturing and lithography methods. More particularly, the present disclosure relates to wiring structures and methods of forming wiring structures in semiconductor devices.
As semiconductor devices have become increasingly integrated, widths of wirings and distances between wirings have decreased. Low resistance wirings are even more important than ever, due in part to the decreased distances between wirings. Unfortunately, decreasing the widths of the wirings generally leads to an increase in resistance. Thus, semiconductor devices are required with low resistance wirings, reduced wiring widths, and reduced distances between adjacent wirings.
When wiring includes a contact plug connected to a conductive line, the contact resistance between the contact plug and the conductive line may be decreased in consideration of the low total wiring resistance desired. In addition, the wiring height may be increased to reduce the wiring resistance, since the wiring resistance is generally increased as the width of the wiring is reduced. The wiring may also be formed using a lower resistance conductive material to further reduce the wiring resistance.
Unfortunately, the alignment between the conductive line and the contact plug may become problematic as the height of the wiring is increased, thereby reducing the contact area between the conductive line and the contact plug. Moreover, much of the metal or metal silicide used in such wiring may not be easily patterned by photolithography processes. Thus, the metal or metal silicide may be inefficiently utilized during formation of the wiring.